Control-ready architecture for self-testing in programmable logical matrix structures
Automation and Remote Control
A 65nm flash-based FPGA fabric optimized for low cost and power
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect
Journal of Electronic Testing: Theory and Applications
Hi-index | 0.03 |
We present a new automatic test-configuration-generation technique for application-independent manufacturing testing of the interconnection network of static-random-access-memory-based field programmable gate arrays (FPGAs). This technique targets detection of open and bridging faults in the wiring channels and programmable switches in the interconnects. Experimental results on Xilinx Virtex FPGAs show that very few test configurations are required to cover stuck-open, stuck-closed, open, and bridging faults in the interconnects.