A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots
Journal of Signal Processing Systems
A truly two-dimensional systolic array FPGA implementation of QR decomposition
ACM Transactions on Embedded Computing Systems (TECS)
A Fine-Grained Pipelined Implementation for Large-Scale Matrix Inversion on FPGA
APPT '09 Proceedings of the 8th International Symposium on Advanced Parallel Processing Technologies
Computational Intelligence and Neuroscience - Special issue on signal processing for neural spike trains
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High performance computation is critical for brain-machine interface (BMI) applications. Current BMI decoding algorithms are always implemented on personal computers (PC) which affect the performance of complex mapping models. In this paper, an FPGA implementation of Kalman filter (KF) algorithm is proposed as a new computational method. The neural ensemble activities are recorded from motor cortex of rats performing a lever-pressing task for water reward. Kalman filter, which is used for mapping neural activities to kinematic variables, is implemented both on PC (MATLAB-based) and FPGA. In FPGA architecture, the row/column-based method is adopted for the matrix operation instead of the traditional element-based method, parallel and pipelined structures are also used for efficient computation at the same time. The results show that the FPGA-based implementation runs 24.45 times faster than the PC-based counterpart while achieving the same accuracy. Such a hardware-based computational method provides a tool for high-performance computation, with profound implications for portable BMI application.