FabScalar: Automating Superscalar Core Design

Authors:
Niket Choudhary;Salil Wadhavkar;Tanmay Shah;Hiran Mayukh;Jayneel Gandhi;Brandon Dwiel;Sandeep Navada;Hashem Najaf-abadi;Eric Rotenberg
Affiliations:
North Carolina State University;North Carolina State University;North Carolina State University;North Carolina State University;North Carolina State University;North Carolina State University;North Carolina State University;North Carolina State University;North Carolina State University
Venue:
IEEE Micro
Year:
2012

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Abstract

Providing multiple superscalar core types on a chip, each tailored to different classes of instruction-level behavior, is an exciting direction for increasing processor performance and energy efficiency. Unfortunately, processor design and verification effort increases with each additional core type, limiting the microarchitectural diversity that can be practically implemented. FabScalar aims to automate superscalar core design, opening up processor design to microarchitectural diversity and its many opportunities.