OTA based on CMOS inverters and application in the design of tunable bandpass filter
Analog Integrated Circuits and Signal Processing
A Gm-C continuous-time analog filter for IEEE 802.11 a/b/g/n wireless LANs
Analog Integrated Circuits and Signal Processing
High speed and silicon-saving adaptive tuning system for high frequency Gm-C filters
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing
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In this article, an inverter based transconductor using double CMOS pair is proposed for implementation of a second order lowpass Gm---C Filter. The proposed operational transconductance amplifier (OTA) and biquad filter are designed using standard 0.35 μm CMOS technology. Simulation results demonstrate the central frequency tunability from 10 kHz to 2.8 MHz which is suitable for the wireless specifications of Bluetooth (650 kHz), CDMA 2000 (700 kHz) and Wideband CDMA (2.2 MHz) applications. The power consumption of the filter is 445 nW and 178 μW at 10 kHz and 2.8 MHz from 3.3 V supply voltage, respectively. The active area occupied by the designed filter on the silicon is 215 脳 720 μm2. The proposed approach guarantees the upper bound on THD to be 驴40 dB for 300 mVpp signal swing. Employing the double CMOS pair in the inverters causes PSRR to reach 68.6 dB which is higher than similar works.