A four-quadrant analog multiplier under a single power supply voltage

  • Authors:
  • Xiaobing Tao;Chao Liu;Tao Zhao

  • Affiliations:
  • Xidian University, Xi'an, China;Xidian University, Xi'an, China;Xidian University, Xi'an, China

  • Venue:
  • Analog Integrated Circuits and Signal Processing
  • Year:
  • 2012

Quantified Score

Hi-index 0.00

Visualization

Abstract

An analog multiplier driven by a single supply voltage is proposed. Some improvements are introduced so as to get a higher performance. The proposed analog multiplier can work precisely in four quadrants with a very small THD. An added OTA keeps the linearity error of the circuit smaller than 1%. The presented multiplier is designed on the 0.6 μm BCD process and the simulation results by HSPICE shows a perfect performance. It can be used in any system that requires a high performance analog multiplier.