Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results
Journal of VLSI Signal Processing Systems
Energy-efficient motion estimation using error-tolerance
Proceedings of the 2006 international symposium on Low power electronics and design
Error-resilient motion estimation architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Although many ASICs for motion estimation have been developed, either the chip complexity is too high or the optimal accuracy was not achieved. In this study, an adaptive full-search algorithm is presented to reduce the searching complexity with a temporal correlation approach. The efficiency of the proposed full search can be promoted about 5-10 times in comparison with the conventional full search while the searching accuracy remains intact. Based on the adaptive full-search algorithm, a real-time VLSI chip is regularly designed by using the module base. For MPEG-2 applications, the computational kernel only uses eight processing elements to meet the speed requirement. The processing rate of the proposed chip can achieve 53 K blocks/s to search from -127 to +127 vectors, using only 8 K gates