Lightweight floating-point arithmetic: case study of inverse discrete cosine transform
EURASIP Journal on Applied Signal Processing
Low power DCT using highly scalable multipliers
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
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An optimal shortest word length implementation of the fast transform based upon mathematical analysis is presented. The flow graph of any fast transform can be expressed as the product of several sparse matrices, where each matrix represents a single pass butterfly operation (i.e., multiplication and accumulation). Each decomposed sparse matrix is analyzed to determine whether a butterfly operation would result in a bit overflow. Additional bits are allocated only to the matrices in which an overflow is likely to occur so that the shortest bit-length implementation is maintained. This methodology is applicable to the shortest bit-length implementation of any fast transform. The application of the proposed method to an existing FDCT algorithm is demonstrated for fixed-point computation