Pulse density Hopfield neural network system with learning capability using FPGA
ACC'08 Proceedings of the WSEAS International Conference on Applied Computing Conference
Pulse density recurrent neural network systems with learning capability using FPGA
WSEAS Transactions on Circuits and Systems
Hardware Neural Network for a Visual Inspection System
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A bit-stream pulse-based digital neuron model for neural networks
ICONIP'06 Proceedings of the 13th international conference on Neural information processing - Volume Part III
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In this paper, we present the design of a deterministic bit-stream neuron, which makes use of the memory rich architecture of fine-grained field-programmable gate arrays (FPGAs). It is shown that deterministic bit streams provide the same accuracy as much longer stochastic bit streams. As these bit streams are processed serially, this allows neurons to be implemented that are much faster than those that utilize stochastic logic. Furthermore, due to the memory rich architecture of fine-grained FPGAs, these neurons still require only a small amount of logic to implement. The design presented here has been implemented on a Virtex FPGA, which allows a very regular layout facilitating efficient usage of space. This allows for the construction of neural networks large enough to solve complex tasks at a speed comparable to that provided by commercially available neural-network hardware.