A programmable analog neural network processor

  • Authors:
  • W. A. Fisher;R. J. Fujimoto;R. C. Smithson

  • Affiliations:
  • Lockheed Palo Alto Res. Lab., CA;-;-

  • Venue:
  • IEEE Transactions on Neural Networks
  • Year:
  • 1991

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Abstract

An analog neural network breadboard consisting of 256 neurons and 2048 programmable synaptic weights of 5 bits each is constructed and tested. The heart of the processor is an array of custom-programmable synapse (resistor) chips on a reconfigurable neuron board. The analog bandwidth of the system is 90 kHz. The breadboard is used to demonstrate the application of neural network learning to the problem of real-time adaptive mirror control. The processor control is 21 actuators of an adaptive mirror with a step-response setting time of 5 ms. The demonstration verified that it is possible to modify the control law of the high-speed analog loop using neural network training without stopping the control loop