Implementation of a new neurochip using stochastic logic

  • Authors:
  • S. Sato;K. Nemoto;S. Akimoto;M. Kinjo;K. Nakajima

  • Affiliations:
  • Lab. for Electron. Intelligent Syst., Tohoku Univ., Sendai, Japan;-;-;-;-

  • Venue:
  • IEEE Transactions on Neural Networks
  • Year:
  • 2003

Quantified Score

Hi-index 0.00

Visualization

Abstract

Even though many neurochips have been developed and investigated, the best suitable way for implementation has not been known clearly. Our approach is to exploit stochastic logic for various operations required for neural functions. The advantage of stochastic logic is that complex operations can be implemented with a few ordinary logic gates. On the other hand, the operation speed is not so fast since stochastic logic requires certain accumulation time for averaging. However, a huge integration can be achieved and its reliability is high because all of operations are done on digital circuits. Furthermore, we propose a nonmonotonic neuron realized by stochastic logic, since the nonmonotonic property is efficient for the performance enhancement in association and learning. In this paper, we show the circuit design and measurement results of a neurochip comprising 50 neurons are shown. The advantages of nonmonotonic and stochastic properties are shown clearly.