Efficient Full-Chip Statistical Leakage Analysis Based on Fast Matrix Vector Product

  • Authors:

  • Mingzhi Gao;Zuochang Ye;Yan Wang;Zhiping Yu

  • Affiliations:

  • Cadence, Shanghai, China;Institute of Microelectronics, Tsinghua University, Beijing, China;Institute of Microelectronics, Tsinghua University, Beijing, China;Institute of Microelectronics, Tsinghua University, Beijing, China

  • Venue:
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Year:
  • 2012

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Abstract

Power consumption has become a major concern since the integrated circuit industry entered the nanometer design regime. Due to the increasing process variation, deterministic leakage power analysis becomes inadequate and thus statistical analysis is required. The challenges of statistical leakage analysis are that the huge number of random variables make trivial computation of the variance in $O(N^{2})$ time impractical for realistic designs and that knowing only the first two moments is not sufficient to obtain the distribution of the full-chip leakage. In this paper, we introduce efficient linear time algorithms for statistical leakage analysis. To enable those algorithms, a fast matrix vector product technique is crucial, being applied not only to compute the second moment of the total leakage, but also, combined with a comonotonic approximation, to estimate the distribution function of the total leakage power. The computational complexity of the proposed algorithms is provably $O(N)$, and the experimental result is presented with detailed discussion, indicating promising improvement in terms of accuracy.