Efficient techniques for near-optimal instrumentation in time-triggered runtime verification

  • Authors:

  • Samaneh Navabpour;Chun Wah Wallace Wu;Borzoo Bonakdarpour;Sebastian Fischmeister

  • Affiliations:

  • Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada;Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada;School of Computer Science, University of Waterloo, Waterloo, Ontario, Canada;Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada

  • Venue:
  • RV'11 Proceedings of the Second international conference on Runtime verification
  • Year:
  • 2011

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Abstract

Time-triggered runtime verification aims at tackling two defects associated with runtime overhead normally incurred in event-triggered approaches: unboundedness and unpredictability . In the time-triggered approach, a monitor runs in parallel with the program and periodically samples the program state to evaluate a set of properties. In our previous work, we showed that to increase the sampling period of the monitor (and hence decrease involvement of the monitor), one can employ auxiliary memory to build a history of state changes between subsequent samples. We also showed that the problem of optimization of the size of history and sampling period is NP-complete. In this paper, we propose a set of heuristics that find near-optimal solutions to the problem. Our experiments show that by employing negligible extra memory at run time, we can solve the optimization problem significantly faster, while maintaining a similar level of overhead as the optimal solution. We conclude from our experiments that the NP-completeness of the optimization problem is not an obstacle when applying time-triggered runtime verification in practice.