Sampling-based runtime verification

  • Authors:

  • Borzoo Bonakdarpour;Samaneh Navabpour;Sebastian Fischmeister

  • Affiliations:

  • Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada;Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada;Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada

  • Venue:
  • FM'11 Proceedings of the 17th international conference on Formal methods
  • Year:
  • 2011

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Abstract

The literature of runtime verification mostly focuses on event-triggered solutions, where a monitor is invoked by every change in the state of the system and evaluates properties of the system. This constant invocation introduces two major drawbacks to the system under scrutiny at run time: (1) significant overhead and (2) unpredictability. To circumvent the latter drawback, in this paper, we introduce a time-triggered approach, where the monitor frequently takes samples from the system to analyze the system's health. We propose formal semantics of sampling-based monitoring and discuss how to optimize the sampling period using minimum auxiliary memory. We show that such optimization is NP-complete and consequently introduce a mapping to Integer Linear Programming. Experiments on benchmark applications show that our approach introduces bounded overhead and effectively reduces involvement of the monitor at run time using negligible auxiliary memory.