Approximate Boyer-Moore string matching
SIAM Journal on Computing
A fast string searching algorithm
Communications of the ACM
Pattern Classification (2nd Edition)
Pattern Classification (2nd Edition)
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Efficient use of random delays in embedded software
WISTP'07 Proceedings of the 1st IFIP TC6 /WG8.8 /WG11.2 international conference on Information security theory and practices: smart cards, mobile and ubiquitous computing systems
Analysis and improvement of the random delay countermeasure of CHES 2009
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Improving differential power analysis by elastic alignment
CT-RSA'11 Proceedings of the 11th international conference on Topics in cryptology: CT-RSA 2011
CARDIS'11 Proceedings of the 10th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
Efficient removal of random delays from embedded software implementations using hidden markov models
CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
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Generating random delays in embedded software is a common countermeasure to complicate side channel attacks. The idea is to insert dummy operations with varying lengths at different moments in time. This creates a non-predictable offset of the attacking point in the time dimension. Since the success of, e.g., a correlation power analysis (CPA) attack is largely affected by the alignment of the power traces, the adversary is forced to apply additional large computations or to record a huge amount of power traces to achieve acceptable results. In this paper, we present a new efficient method to identify random delays in power measurements. Our approach does not depend on how the random delays are generated. Plain uniform delays can be removed as well as Benoit-Tunstall [11] or improved floating mean delays [4]. The procedure can be divided into three steps. The first step is to convert the power trace into a string depending on the Hamming weights of the opcodes. After this, the patterns of the dummy operations are identified. The last step is to use a string matching algorithm to find these patterns and to align the power traces. We have started our analysis with two microcontrollers, an Atmel AVR ATmega8 and a Microchip PIC16F54. For our practical evaluation, we have focused on the ATmega8. However, the results can be applied to many other microcontrollers with a similar architecture.