Specifying UML protocol state machines in alloy

  • Authors:
  • Ana Garis;Ana C. R. Paiva;Alcino Cunha;Daniel Riesco

  • Affiliations:
  • Universidad Nacional de San Luis, Argentina;DEI-FEUP, Universidade do Porto, Portugal;HASLab, INESC TEC and Universidade do Minho, Portugal;Universidad Nacional de San Luis, Argentina

  • Venue:
  • IFM'12 Proceedings of the 9th international conference on Integrated Formal Methods
  • Year:
  • 2012

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Abstract

A UML Protocol State Machine (PSM) is a behavioral diagram for the specification of the external behavior of a class, interface or component. PSMs have been used in the software development process for different purposes, such as requirements analysis and testing. However, like other UML diagrams, they are often difficult to validate and verify, specially when combined with other artifacts, such as Object Constraint Language (OCL) specifications. This drawback can be overcome by application of an off-the-shelf formal method, namely one supporting automatic validation and verification. Among those, we have the increasingly popular Alloy, based on a simple relational flavor of first-order logic. This paper presents a model transformation from PSMs, optionally complemented with OCL specifications, to Alloy. Not only it enables automatic verification and validation of PSMs, but also a smooth integration of Alloy in current software development practices.