Novel FEXT cancellation and equalization for high speed ethernet transmission
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Design of an all-digital LVDS driver
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2008 custom integrated circuits conference (CICC 2008)
A 33mW 12.5Gbps BiCMOS transmitter for high speed backplane applications
Microelectronics Journal
A 1.8 V low power 5 Gbps PMOS-based LVDS output driver with good return loss performance
Analog Integrated Circuits and Signal Processing
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Although low-voltage differential signaling (LVDS) is one of the very popular technologies which simultaneously address low dynamic power consumption and high data rate transmission in modern high speed circuit applications. However, signal integrity at receiving ends will be strongly dependent on the off chip transmission path even using LVDS transmission technique. In this paper, we propose a novel high-speed off chip data transmission driver with built-in self detection functions which include frequency detection and duty-cycle detection capabilities. With these built-in detection functionalities, we can monitor signal quality at the end of off-chip transmission path no matter which kind of transmission path system user chooses. Besides, users can also utilize the detection information to make adjustment on the input signal at the beginning of transmission path. Therefore, the novel proposed transmission driver simultaneously posses high-speed and good signal integrity for off-chip transmission applications. The design was implemented using standard 3.3 V 0.35 μm CMOS technology with overall chip size of 0.91 mm2. Simulation and measurement results both successfully verify the novelty and achievement of this work.