Accelerating the singular value decomposition of rectangular matrices with the CSK600 and the integrable SVD

Authors:
Yusaku Yamamoto;Takeshi Fukaya;Takashi Uneyama;Masami Takata;Kinji Kimura;Masashi Iwasaki;Yoshimasa Nakamura
Affiliations:
Nagoya University, Nagoya, Japan;Nagoya University, Nagoya, Japan;Kyoto University, Kyoto, Japan;Nara Women's University, Nara, Japan;Niigata University, Niigata, Japan;Kyoto Prefectural University, Japan;Kyoto University, Kyoto, Japan
Venue:
PaCT'07 Proceedings of the 9th international conference on Parallel Computing Technologies
Year:
2007

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Abstract

We propose an approach to speed up the singular value decomposition (SVD) of very large rectangular matrices using the CSX600 floating point coprocessor. The CSX600-based acceleration board we use offers 50GFLOPS of sustained performance, which is many times greater than that provided by standard microprocessors. However, this performance can be achieved only when a vendor-supplied matrix-matrix multiplication routine is used and the matrix size is sufficiently large. In this paper, we optimize two of the major components of rectangular SVD, namely, QR decomposition of the input matrix and back-transformation of the left singular vectors by matrix Q, so that large-size matrix multiplications can be used efficiently. In addition, we use the Integrable SVD algorithm to compute the SVD of an intermediate bidiagonal matrix. This helps to further speed up the computation and reduce the memory requirements. As a result, we achieved up to 3.5 times speedup over the Intel Math Kernel Library running on an 3.2GHz Xeon processor when computing the SVD of a 100,000 × 4000 matrix.