The 128-bit blockcipher CLEFIA

Authors:
Taizo Shirai;Kyoji Shibutani;Toru Akishita;Shiho Moriai;Tetsu Iwata
Affiliations:
Sony Corporation, Minato-ku, Tokyo, Japan;Sony Corporation, Minato-ku, Tokyo, Japan;Sony Corporation, Minato-ku, Tokyo, Japan;Sony Corporation, Minato-ku, Tokyo, Japan;Nagoya University, Chikusa-ku, Nagoya, Japan
Venue:
FSE'07 Proceedings of the 14th international conference on Fast Software Encryption
Year:
2007

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Abstract

We propose a new 128-bit blockcipher CLEFIA supporting key lengths of 128, 192 and 256 bits, which is compatible with AES. CLEFIA achieves enough immunity against known attacks and flexibility for efficient implementation in both hardware and software by adopting several novel and state-of-the-art design techniques. CLEFIA achieves a good performance profile both in hardware and software. In hardware using a 0.09 µm CMOS ASIC library, about 1.60 Gbps with less than 6 Kgates, and in software, about 13 cycles/byte, 1.48 Gbps on 2.4 GHz AMD Athlon 64 is achieved. CLEFIA is a highly efficient blockcipher, especially in hardware.