A timed model for communicating sequential processes
Theoretical Computer Science - Thirteenth International Colloquim on Automata, Languages and Programming, Renne
Control systems engineering
ACM Computing Surveys (CSUR)
The Theory and Practice of Concurrency
The Theory and Practice of Concurrency
A New Hardware Fault Insertion Scheme for System Diagnostics Verification
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Fault-Tolerant Systems
On using data abstractions for model checking refinements
Acta Informatica
A Mechanized Strategy for Safe Abstraction of CSP Specifications
Formal Methods: Foundations and Applications
Feedback Systems: An Introduction for Scientists and Engineers
Feedback Systems: An Introduction for Scientists and Engineers
MODIFI: a MODel-implemented fault injection tool
SAFECOMP'10 Proceedings of the 29th international conference on Computer safety, reliability, and security
Evolving a safe system design iteratively
SAFECOMP'10 Proceedings of the 29th international conference on Computer safety, reliability, and security
Systematic model-based safety assessment via probabilistic model checking
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
Computer-aided PHA, FTA and FMEA for automotive embedded systems
SAFECOMP'11 Proceedings of the 30th international conference on Computer safety, reliability, and security
Experience with fault injection experiments for FMEA
Software—Practice & Experience
Architectural verification of control systems using CSP
ICFEM'11 Proceedings of the 13th international conference on Formal methods and software engineering
Model-based safety analysis of simulink models using SCADE design verifier
SAFECOMP'05 Proceedings of the 24th international conference on Computer Safety, Reliability, and Security
Practical Reliability Engineering
Practical Reliability Engineering
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Critical control systems can only be used after approval of certification authorities due to safety reasons, among other aspects. Undetected failures in such systems can be catastrophic, including the loss of human lives or huge amounts of money. The safety assessment process aims to minimize such problems. But actually it still is largely dependent on human support (engineer's experience). To decrease this human dependency, we propose a systematic hardware-based failure identification strategy. Following common practices in industry, which use Simulink diagrams to design (critical) control systems, the starting point of our proposed strategy is Simulink diagrams. The systematic identification is performed by the model checker FDR [11]. Therefore, we translate Simulink diagrams into CSPM specifications [30]. With our strategy, engineers only need to label certain Simulink elements as hardware and choose specific failure names for the generic ones our strategy provides. We illustrate our work on a simple but real case study supplied by our industrial partner EMBRAER.