Encountering gate oxide breakdown with shadow transistors to increase reliability
Proceedings of the 21st annual symposium on Integrated circuits and system design
Fault-Tolerant Memory Design and Partitioning Issues in Embryonics
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
Automatic workarounds as failure recoveries
Proceedings of the 2008 Foundations of Software Engineering Doctoral Symposium
Reliability and survivability methodologies for next generation networks
Proceedings of the 6th International Conference on Advances in Mobile Computing and Multimedia
A compiler optimization to reduce soft errors in register files
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Automatic Generation of Runtime Failure Detectors from Property Templates
Software Engineering for Self-Adaptive Systems
ISA '09 Proceedings of the 3rd International Conference and Workshops on Advances in Information Security and Assurance
ICOST '09 Proceedings of the 7th International Conference on Smart Homes and Health Telematics: Ambient Assistive Health and Wellness Management in the Heart of the City
Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
New Challenges in Dynamical Systems: The Networked Case
International Journal of Applied Mathematics and Computer Science - Selected Problems of Computer Science and Control
Energy-efficient redundant execution for chip multiprocessors
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Improving impact of self-adaptation and self-management research through evaluation methodology
Proceedings of the 2010 ICSE Workshop on Software Engineering for Adaptive and Self-Managing Systems
A compiler-microarchitecture hybrid approach to soft error reduction for register files
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
AgeSim: a simulation framework for evaluating the lifetime reliability of processor-based SoCs
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
Reducing the storage requirements of a test sequence by using a background vector
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
A task remapping technique for reliable multi-core embedded systems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Efficient Concurrent Self-Test with Partially Specified Patterns
Journal of Electronic Testing: Theory and Applications
In-network data acquisition and replication in mobile sensor networks
Distributed and Parallel Databases
Fault tolerant framework and techniques for component-based autonomous robot systems
Proceedings of the 2011 ACM Symposium on Applied Computing
Mapping of applications to MPSoCs
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A middleware approach to achieving fault tolerance of Kahn process networks on networks on chips
International Journal of Reconfigurable Computing - Special issue on selected papers from the international workshop on reconfigurable communication-centric systems on chips (ReCoSoC' 2010)
Behavioural preservation in fault tolerant patterns
SBMF'11 Proceedings of the 14th Brazilian conference on Formal Methods: foundations and Applications
Assessing system vulnerability using formal verification techniques
MEMICS'11 Proceedings of the 7th international conference on Mathematical and Engineering Methods in Computer Science
Fault analysis of the NTRUSign digital signature scheme
Cryptography and Communications
A clustering-based methodology for selection of fault tolerance techniques
ICAISC'12 Proceedings of the 11th international conference on Artificial Intelligence and Soft Computing - Volume Part II
A fault attack on the LED block cipher
COSADE'12 Proceedings of the Third international conference on Constructive Side-Channel Analysis and Secure Design
ACM Transactions on Embedded Computing Systems (TECS)
Effect of malicious hardware logic on circuit reliability
VDAT'12 Proceedings of the 16th international conference on Progress in VLSI Design and Test
Time-Constraint-Aware Optimization of Assertions in Embedded Software
Journal of Electronic Testing: Theory and Applications
Identifying hardware failures systematically
SBMF'12 Proceedings of the 15th Brazilian conference on Formal Methods: foundations and applications
Comparative language fuzz testing: programming languages vs. fat fingers
Proceedings of the ACM 4th annual workshop on Evaluation and usability of programming languages and tools
A novel intermittent fault Markov model for deep sub-micron processors
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
An hybrid architecture to detect transient faults in microprocessors: an experimental validation
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
A survey of checker architectures
ACM Computing Surveys (CSUR)
The Journal of Supercomputing
L24: Parallelism, performance, energy efficiency, and cost trade-offs in future sensor platforms
ACM Transactions on Embedded Computing Systems (TECS)
Journal of Systems Architecture: the EUROMICRO Journal
Fault-tolerant scheduling in homogeneous real-time systems
ACM Computing Surveys (CSUR)
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project
Microprocessors & Microsystems
Energy-aware task mapping and scheduling for reliable embedded computing systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
ACM Transactions on Embedded Computing Systems (TECS)
Failure-Aware Task Scheduling of Synchronous Data Flow Graphs Under Real-Time Constraints
Journal of Signal Processing Systems
A low-cost fault tolerant solution targeting commercial FPGA devices
Journal of Systems Architecture: the EUROMICRO Journal
Communication and migration energy aware task mapping for reliable multiprocessor systems
Future Generation Computer Systems
Fast damage recovery in robotics with the T-resilience algorithm
International Journal of Robotics Research
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There are many applications in which the reliability of the overall system must be far higher than the reliability of its individual components. In such cases, designers devise mechanisms and architectures that allow the system to either completely mask the effects of a component failure or recover from it so quickly that the application is not seriously affected. This is the work of fault-tolerant designers and their work is increasingly important and complex not only because of the increasing number of "mission critical" applications, but also because the diminishing reliability of hardware means that even systems for non-critical applications will need to be designed with fault-tolerance in mind. Reflecting the real-world challenges faced by designers of these systems, this book addresses fault tolerance design with a systems approach to both hardware and software. No other text on the market takes this approach, nor offers the comprehensive and up-to-date treatment Koren and Krishna provide. Students, designers and architects of high performance processors will value this comprehensive overview of the field.* The first book on fault tolerance design with a systems approach* Comprehensive coverage of both hardware and software fault tolerance, as well as information and time redundancy* Incorporated case studies highlight six different computer systems with fault-tolerance techniques implemented in their design* Available to lecturers is a complete ancillary package including online solutions manual for instructors and PowerPoint slides