Leakage control with efficient use of transistor stacks in single threshold CMOS
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Techniques for Yield Enhancement of VLSI Adders
ASAP '95 Proceedings of the IEEE International Conference on Application Specific Array Processors
Modeling the Random Parameters Effects in a Non-Split Model of Gate Oxide Short
Journal of Electronic Testing: Theory and Applications
The Case for Lifetime Reliability-Aware Microprocessors
Proceedings of the 31st annual international symposium on Computer architecture
The Impact of Technology Scaling on Lifetime Reliability
DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
Enhancing Yield at the End of the Technology Roadmap
IEEE Design & Test
Fault-Tolerant Systems
Encountering gate oxide breakdown with shadow transistors to increase reliability
Proceedings of the 21st annual symposium on Integrated circuits and system design
Reliability limits for the gate insulator in CMOS technology
IBM Journal of Research and Development
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Because of the aggressive scaling of integrated circuits and the given limits of atomic scales, circuit designers have to become more and more aware of the arising reliability and yield concerns. So far, only very little research efforts have been put into low-level approaches for lifetime reliability, whereas lots of efforts have focused on soft-errors and system-level solutions. In this paper, we introduce and compare three diverse design approaches which apply redundancy on different abstraction levels to enhance the reliability of a Wallace multiplier as regards gate oxide breakdown. The results of the test design were further improved by adding transistors and gates with different gate oxide thicknesses. The achieved results show that lifetime reliability increases up to 200 % at constant delay by adding redundant gates, subsequently called Twin Logic Gates. However, this comes at the price of overhead for area as well as power consumption. Furthermore, it needs to be noted that the presented strategies can additionally improve defect yield.