A linearized technique in an All-MOS transconductance amplifier

Authors:
Ding-Lan Shen;Yu-Jung Chu;Hong-Wen Chen
Affiliations:
Department of Electrical Engineering, Fu Jen Catholic University, No. 510 Zhongzheng Rd., Xinzhuang Dist., New Taipei City 24205, Taiwan;Department of Electrical Engineering, Fu Jen Catholic University, No. 510 Zhongzheng Rd., Xinzhuang Dist., New Taipei City 24205, Taiwan;Department of Electrical Engineering, Fu Jen Catholic University, No. 510 Zhongzheng Rd., Xinzhuang Dist., New Taipei City 24205, Taiwan
Venue:
Microelectronics Journal
Year:
2012

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Abstract

A linearized technique in an all-MOS transconductance amplifier is presented. This proposed technique utilizes a simple source follower without the need of complex circuits. The linearization principle and the design methodology are demonstrated in this paper. The corresponding circuit has been fabricated in a 0.35@mm CMOS technology, and its active chip area is 145.8x79.6@mm^2. From the experimental results, the proposed technique improves the nonlinearity error from 10.92% to 0.64% at a 3.3V supply voltage.