Power efficiency of switch architecture extensions for fault tolerant NoC design

Authors:
Alberto Ghiribaldi;Alessandro Strano;Michele Favalli;Davide Bertozzi
Affiliations:
ENDIF, University of Ferrara, 44122, Italy;ENDIF, University of Ferrara, 44122, Italy;ENDIF, University of Ferrara, 44122, Italy;ENDIF, University of Ferrara, 44122, Italy
Venue:
IGCC '12 Proceedings of the 2012 International Green Computing Conference (IGCC)
Year:
2012

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A feature-rich NoC switch with cross-feature optimizations for the next generation of reliable and reconfigurable embedded systems

Proceedings of the 8th International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip

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Abstract

The increasingly parallel landscape of embedded computing platforms is bringing the reliability concern for the on-chip interconnection network (NoC) to the forefront.