A feature-rich NoC switch with cross-feature optimizations for the next generation of reliable and reconfigurable embedded systems

  • Authors:
  • Alessandro Strano;Alberto Ghiribaldi;Herve Tatenguem Fankem;Davide Bertozzi

  • Affiliations:
  • ENDIF, University of Ferrara, Ferrara, Italy;ENDIF, University of Ferrara, Ferrara, Italy;ENDIF, University of Ferrara, Ferrara, Italy;ENDIF, University of Ferrara, Ferrara, Italy

  • Venue:
  • Proceedings of the 8th International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip
  • Year:
  • 2014

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Abstract

The digital design convergence, together with the new usage models of mobile devices, are raising the clear need for new requirements such as flexible partitioning, runtime adaptivity, reliability. In turn, such feature-rich architectures make the testing challenge more severe. The above trend has direct implications on the design of the underlying on-chip network, which becomes not only the system integration framework, but also the control framework executing hypervisor commands, or reacting to runtime operating conditions. The ultimate challenge for the NoC is to co-design these features together, while taking advantage of cross-feature optimization opportunities. This paper takes on this challenge and illustrates the design experience of a NoC switch architecture serving as the key enabler for the next generation of reliable and reconfigurable systems.