High-performance multi-queue buffers for VLSI communications switches
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
High-speed switch scheduling for local-area networks
ACM Transactions on Computer Systems (TOCS)
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
High Performance Switches and Routers
High Performance Switches and Routers
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In this paper we present Maximal Size Matching with Permanent Selection (MSMPS) algorithm [1] which is responsibilities for circuit switching control. We discussed the general algorithm rules and circuit switching architecture which was used in our research. This switch architecture uses Virtual Output Queues (VOQ) for buffering incoming packets. MSMPS algorithm based on permanent connections between inputs and outputs. Simulations confirm that for large load our algorithm provides better efficiency than other algorithms.