Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
1V CMOS Gm-C Filters: Design and Applications
1V CMOS Gm-C Filters: Design and Applications
A highly linear CMOS transconductance amplifier in 180 nm process technology
Analog Integrated Circuits and Signal Processing
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In this paper, after addressing the effect of finite output impedance of Gm cells on the performance of Gm-C filters, a modified configuration suitable for low-voltage operation is presented. In the proposed architecture, to efficiently increase the output impedance, body-driven impedance boosting is employed. The circuit-level topology of Gm cells is modified in order to increase the output impedance with minimized power consumption. To show the effectiveness of the proposed scheme, a 0.9-V 5-th order Butterworth low-pass filter with 8 MHz cutoff frequency is designed and simulated in 90-nm CMOS technology. Employing the proposed technique, power consumption is reduced from 0.7 mW to 0.5 mW.