Scaling the "memory wall"

Authors:
Shih-Lien Lu;Tanay Karnik;Ganapati Srinivasa;Kai-Yuan Chao;Doug Carmean;Jim Held
Affiliations:
Intel Corporation, Hillsboro Oregon;Intel Corporation, Hillsboro Oregon;Intel Corporation, Hillsboro Oregon;Intel Corporation, Hillsboro Oregon;Intel Corporation, Hillsboro Oregon;Intel Corporation, Hillsboro Oregon
Venue:
Proceedings of the International Conference on Computer-Aided Design
Year:
2012

Citing 2
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A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies

ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Future scaling of processor-memory interfaces

Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis

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Abstract

DRAM has been the technology for computer main memory since Intel released the first commercial DRAM chip (i1103) in 1970. As technology scales and demand for memory performance, it seems DRAM is facing several challenges. Many other memory technologies are anticipated to replace it but none has emerged as a clear winner thus far. In this paper we post the question. Is it possible to re-examine the design of DRAM to continue its life for another decade at least?