Global design of analog cells using statistical optimization techniques
Analog Integrated Circuits and Signal Processing - Special issue on analog signal processing
Enhanced simulated annealing for globally minimizing functions of many-continuous variables
ACM Transactions on Mathematical Software (TOMS)
Design of modulators for oversampled converters
Design of modulators for oversampled converters
Ant algorithms for discrete optimization
Artificial Life
A Taxonomy of Hybrid Metaheuristics
Journal of Heuristics
The sizing rules method for analog integrated circuit design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A 3.3 V, 10 Bits, Clock-Feedthrough Compensated Switched-Current Second Order Sigma-Delta Modulator
Analog Integrated Circuits and Signal Processing
An effective use of crowding distance in multiobjective particle swarm optimization
GECCO '05 Proceedings of the 7th annual conference on Genetic and evolutionary computation
Optimizing performances of switched current memory cells through a heuristic
Analog Integrated Circuits and Signal Processing
MOPSO: a proposal for multiple objective particle swarm optimization
CEC '02 Proceedings of the Evolutionary Computation on 2002. CEC '02. Proceedings of the 2002 Congress - Volume 02
The particle swarm - explosion, stability, and convergence in amultidimensional complex space
IEEE Transactions on Evolutionary Computation
Automated synthesis of current-memory cells
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analog Integrated Circuits and Signal Processing
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This paper presents the optimal design of a switched current sigma delta modulator. The Multi-objective Particle Swarm Optimization technique is adopted to optimize performances of the embryonic cell forming the modulator, that is, a class AB grounded gate switched current memory cell. The embryonic cell was optimized regarding to its main performances such as sampling frequency and signal to noise ratio. The optimized memory cell was used to design the switched current modulator which operates at a 100 MHz sampling frequency and the output signal spectrum presents a 45.75 dB signal to noise ratio.