A Fault-Tolerant Dynamic Scheduling Algorithm for Multiprocessor Real-Time Systems and Its Analysis
IEEE Transactions on Parallel and Distributed Systems
Hardware/Software CO-Design: Principles and Practice
Hardware/Software CO-Design: Principles and Practice
Embedded Software Development with eCos
Embedded Software Development with eCos
Managing dynamic concurrent tasks in embedded real-time multimedia systems
Proceedings of the 15th international symposium on System Synthesis
An Asymmetric Real-Time Scheduling for Linux
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Scratchpad memory: design alternative for cache on-chip memory in embedded systems
Proceedings of the tenth international symposium on Hardware/software codesign
Heterogeneous Multiprocessor Scheduling and Allocation using Evolutionary Algorithms
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Performance Evaluation of Real Time Schedulers for a Multicomputer
DS-RT '02 Proceedings of the Sixth IEEE International Workshop on Distributed Simulation and Real-Time Applications
Feasibility Analysis of Preemptive Real-Time Systems upon Heterogeneous Multiprocessor Platforms
RTSS '04 Proceedings of the 25th IEEE International Real-Time Systems Symposium
A technique for low energy mapping and routing in network-on-chip architectures
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Hardware/software managed scratchpad memory for embedded system
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Dynamic partitioning of processing and memory resources in embedded MPSoC architectures
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Performance Analysis of Cache and Scratchpad Memory in an Embedded High Performance Processor
ITNG '08 Proceedings of the Fifth International Conference on Information Technology: New Generations
Proceedings of the conference on Design, automation and test in Europe
System-scenario-based design of dynamic embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An architecture and implementation of MPEG audio layer III decoder using dual-core DSP
IEEE Transactions on Consumer Electronics
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This article presents the design of a video decoder using dynamic task partition approach on a heterogeneous dual-core embedded platform. For such systems, static task partition between the two cores at design time is a typical approach for application development. In this article, we propose a runtime dynamic task partition model and implement an MPEG-4 Simple Profile video decoder using this approach on a TI OMAP 5912 platform. Comparing with a traditional mobile video decoder optimized for the same DSP core, the performance gain from dynamic task partition is 38.4% on average. More importantly, the gain is achieved with the design constraint that the implementation effort for the dynamic task partition decoder is about the same as the effort using design-time task partition model. Unlike common belief that the inter-processor communication overhead would be too high to justify intense cooperation between two heterogeneous cores, this paper shows that it is indeed beneficial to adopt dynamic task partition model on commercially available heterogeneous multi-core platforms.