Parallel simulation of the IBM SP2 interconnection network
WSC '95 Proceedings of the 27th conference on Winter simulation
Asynchronous Parallel Simulation of Parallel Programs
IEEE Transactions on Software Engineering
Compiler-optimized simulation of large-scale applications on high performance architectures
Journal of Parallel and Distributed Computing - Parallel and Distributed Discrete Event Simulation--An Emerging Technology
BoomerAMG: a parallel algebraic multigrid solver and preconditioner
Applied Numerical Mathematics - Developments and trends in iterative methods for large systems of equations—in memoriam Rüdiger Weiss
DRAMsim: a memory system simulator
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
Simulation-based performance prediction for large parallel machines
International Journal of Parallel Programming - Special issue: The next generation software program
The M5 Simulator: Modeling Networked Systems
IEEE Micro
Performance prediction of large-scale parallell system and application using macro-level simulation
Proceedings of the 2008 ACM/IEEE conference on Supercomputing
Introducing the open trace format (OTF)
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part II
Communication Requirements and Interconnect Optimization for High-End Scientific Applications
IEEE Transactions on Parallel and Distributed Systems
ACM SIGMETRICS Performance Evaluation Review - Special issue on the 1st international workshop on performance modeling, benchmarking and simulation of high performance computing systems (PMBS 10)
SRC: automatic extraction of SST/macro skeleton models
Proceedings of the international conference on Supercomputing
Toward codesign in high performance computing systems
Proceedings of the International Conference on Computer-Aided Design
Semi-automatic extraction of software skeletons for benchmarking large-scale parallel applications
Proceedings of the 2013 ACM SIGSIM conference on Principles of advanced discrete simulation
Validation and uncertainty assessment of extreme-scale HPC simulation through bayesian inference
Euro-Par'13 Proceedings of the 19th international conference on Parallel Processing
A synthetic task model for HPC-grade optical network performance evaluation
IA^3 '13 Proceedings of the 3rd Workshop on Irregular Applications: Architectures and Algorithms
A communications simulation methodology for AMR codes using task dependency analysis
IA^3 '13 Proceedings of the 3rd Workshop on Irregular Applications: Architectures and Algorithms
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Efficient design of hardware and software for large-scale parallel execution requires detailed understanding of the interactions between the application, computer, and network. The authors have developed a macro-scale simulator SST/macro that permits the coarse-grained study of distributed-memory applications. In the presented work, applications using the Message Passing Interface MPI are simulated; however, the simulator is designed to allow inclusion of other programming models. The simulator is driven from either a trace file or a skeleton application. Trace files can be either a standard format Open Trace Format or a more detailed custom format DUMPI. The simulator architecture is modular, allowing it to easily be extended with additional network models, trace file formats, and more detailed processor models. This paper describes the design of the simulator, provides performance results, and presents studies showing how application performance is affected by machine characteristics.