A simple architecture for constant time sorting machines

Authors:
Tsong-Chih Hsu;Sheng-De Wang
Affiliations:
Dept. of Electrical Engineering, EE Building, Rm. 441, National Taiwan University Taipei, Taiwan, R.O.C.;Dept. of Electrical Engineering, EE Building, Rm. 441, National Taiwan University Taipei, Taiwan, R.O.C.
Venue:
ACM SIGARCH Computer Architecture News
Year:
1995

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Abstract

In this paper, we propose a constant time sorting algorithm on an array composed of comparators and single-pole-double-throw switches, which is far more feasible than other constant time sorting algorithms [21]-[23]. Our results shown that the algorithm uses time T = Θ(1) and area A = O(N3). This nearly matches the AT2 = Ω(N2 log2 N) lower bound for sorting in the VLSI model.