Design techniques of low-power embedded EEPROM for passive RFID tag

Authors:
Zhaoxian Cheng;Xiaoxing Zhang;Yujie Dai;Yingjie Lu
Affiliations:
Institute of Microelectronics, Nankai University, Tianjin, People's Republic of China 300457;Institute of Microelectronics, Nankai University, Tianjin, People's Republic of China 300457;Institute of Microelectronics, Nankai University, Tianjin, People's Republic of China 300457;Institute of Microelectronics, Nankai University, Tianjin, People's Republic of China 300457
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2013

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Abstract

This paper presents an optimized embedded EEPROM design approach which has reduced the power significantly in a short-range passive RFID tag. The proposed array control circuit employs an improved structure to minimize the leakage of memory bit cells. With the proposed array circuit design, the passive RFID tag can operate drawing a low quiescent current. The RFID tag with the proposed EEPROM was fabricated in a standard 0.35-μm four-metal two-poly CMOS process. Measurement results show that the erasing/writing current is 45 μA, and reading current consumption is 3 μA with a supply voltage of 3.3 V. The data read time is 300 ns/bit.