Design of ultra-low-cost UHF RFID tags for supply chain applications

Authors:
R. Glidden;C. Bockorick;S. Cooper;C. Diorio;D. Dressler;V. Gutnik;C. Hagen;D. Hara;T. Hass;T. Humes;J. Hyde;R. Oliver;O. Onen;A. Pesavento;K. Sundstrom;M. Thomas
Affiliations:
Impinj Inc., Seattle, WA, USA;-;-;-;-;-;-;-;-;-;-;-;-;-;-;-
Venue:
IEEE Communications Magazine
Year:
2004

Citing 0
Cited 13

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A CMOS transmitter front-end for mobile UHF RFID reader

WiCOM'09 Proceedings of the 5th International Conference on Wireless communications, networking and mobile computing
Cost-benefit model for smart items in the supply chain

IOT'08 Proceedings of the 1st international conference on The internet of things
A dual mode UHF EPC Gen 2 RFID tag in 0.18µm CMOS

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A low power CMOS compatible embedded EEPROM for passive RFID tag

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Power efficient multi-stage CMOS rectifier design for UHF RFID tags

Integration, the VLSI Journal
A new type of low power read circuit in EEPROM for UHF RFID

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Design techniques of low-power embedded EEPROM for passive RFID tag

Analog Integrated Circuits and Signal Processing

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Abstract

The availability of inexpensive CMOS technologies that perform well at microwave frequencies has created new opportunities for automated material handling within supply chain management (SCM) that in hindsight, be viewed as revolutionary. This article outlines the system architecture and circuit design considerations that influence the development of radio frequency identification (RFID) tags through a case study involving a high-performance implementation that achieves a throughput of nearly 800 tags/s at a range greater than 10 m. The impact of a novel circuit design approach ideally suited to the power and die area challenges is also discussed. Insights gleaned from first-generation efforts are reviewed as an object lesson in how to make RFID technology for SCM, at a cost measured in pennies per tag, reach its full potential through a generation 2 standard.