Compact yet high performance (CyHP) library for short time-to-market with new technologies
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Design of Low-power Baseband-processor for RFID Tag
SAINT-W '06 Proceedings of the International Symposium on Applications on Internet Workshops
Design of a Low-Power Digital Core for Passive UHF RFID Transponder
DSD '06 Proceedings of the 9th EUROMICRO Conference on Digital System Design
An evolutionary approach for standard-cell library reduction
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Design of ultra-low-cost UHF RFID tags for supply chain applications
IEEE Communications Magazine
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Recently, radio frequency identification (RFID) systems have gained popularity in manufacturing units, inventory, and logistics, as they represent an inexpensive and reliable solution for automatic identification. Moreover, RFID transponders are expected to become a key element in the ubiquitous computing scenario. Tags will likely be used to collect sensors data, enabling noninvasive environment monitoring. Low-cost passive UHF transponders are expected to play a major role in this context, due to extended read range capabilities. Within a passive tag, power harvested from the field irradiated by the reader during the communication should operate both digital control circuitry and potential sensing devices. Exploiting ultra-low power tag circuitry would provide sensing sections with higher energy, thus improving measurement performance. In this paper, the design of a novel circuit is presented, which implements the baseband processor of a UHF-RFID tag in compliance with the ISO 18000-6B protocol. Regardless of protocol selection issues, several power saving strategies are devised, both at the system and circuit levels, suitable for passive transponder implementation. Near-threshold operation has been exploited to attain ultra-low power consumption while keeping fair performance. A set of standard cells has been designed, suitable for the power-limited specific application. The proposed solution has been successfully checked by means of a physical implementation on CMOS 0.18 µm technology. Test chips have been characterized in terms of voltage and frequency operating range and power consumption figure has been extensively analyzed. Measurement results fully support the selected design approach: the baseband processor dissipates only 440 nW average power when operated at 800 kHz and 0.6 V. This extremely-low power consumption enables high-performance ubiquitous computing.