Design of Low-power Baseband-processor for RFID Tag

  • Authors:
  • He Yan;Hu jianyun;Li Qiang;Min Hao

  • Affiliations:
  • Fudan University, China;Fudan University, China;Fudan University, China;Fudan University, China

  • Venue:
  • SAINT-W '06 Proceedings of the International Symposium on Applications on Internet Workshops
  • Year:
  • 2006

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Abstract

This paper analyzes the power consumption of an RFID tag and presents a new architecture of a low-power baseband-processor for this special passive tag. The tag consists of a power reception system, an emitter/receiver analog module, an EEPROM and a low-power basebandprocessor, compatible with the newest EPCTM C1G2 UHF RFID Protocol. Meanwhile some novel and advanced lowpower technologies are adopted for the special low-power baseband-processor, which not only implements the anticollision schemes and authorization scheme, but also executes read/write operation to EEPROM. The chip was designed and fabricated using 0.35 ìm 3 metal layers CMOS technology successfully.