Parallel architecture for accelerating affine transform in high-speed imaging systems

Authors:
Pradyut Kumar Biswal;Pulak Mondal;Swapna Banerjee
Affiliations:
Department of Electronics and Electrical Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India 721302;Department of Electronics and Electrical Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India 721302;Department of Electronics and Electrical Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India 721302
Venue:
Journal of Real-Time Image Processing
Year:
2013

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Abstract

Affine transform is widely used in the high speed image processing systems. This transform plays an important role in various high speed applications like Optical quadrature microscopy (OQM), image stabilisation in digital camera and image registration etc. In these applications, transformations of image consume most of the execution time. Hence, for high speed imaging systems, acceleration of Affine transform is very much sought for. In this paper, the pipelined architecture implementation of a proposed inherent parallel algorithm for Affine transform has been presented. The acceleration of the image transformation will help in reducing the processing time of high speed imaging systems. The architecture is mapped in Field programmable gate array (FPGA) and the result shows that the proposed algorithm is almost 4 times faster than the conventional algorithm while retaining the image quality. Using the proposed algorithm, an image of size 1,920 脳 1,080 can be transformed with a frame rate of 540 frames per second and the multiplane image synthesis for image stabilisation on the same digital image can be performed with a frame rate of 65 fps.