Graphical Models and Image Processing
Digital Image Warping
Beyond Photography: The Digital Darkroom
Beyond Photography: The Digital Darkroom
2-D Mesh Geometry and Motion Compression for Efficient Object-Based Video Representation
ICIP '97 Proceedings of the 1997 International Conference on Image Processing (ICIP '97) 3-Volume Set-Volume 3 - Volume 3
New kernels for fast mesh-based motion estimation
IEEE Transactions on Circuits and Systems for Video Technology
Analysis and Hardware Architecture Design of Global Motion Estimation
Journal of Signal Processing Systems
Parallel architecture for accelerating affine transform in high-speed imaging systems
Journal of Real-Time Image Processing
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Affine transformation is widely used in image processing. Recently, it is recommended by MPEG-4 for video motion compensation. This paper presents a novel low power parallel architecture for texture warping using affine transformation (AT). The architecture uses a novel multiplication-free algorithm that employs the algebraic properties of the AT. Low power has been achieved at different levels of the design. At the algorithmic level, replacing multiplication operations with bit shifting saves the power and delay of using a multiplier. At the architecture level, low power is achieved by using parallel computational units, where the latency constraints and/or the operating latency can be reduced. At the circuit level, using low power building blocks (such as low power adders) contributes to the power savings. The proposed architecture is used as a computational kernel in video object coders. It is compatible with MPEG-4 and VRML standards. The architecture has been prototyped in 0.6 μm CMOS technology with three layers of metal. The performance of the proposed architecture shows that it can be used in mobile and handheld applications.