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ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI
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ICSENG '11 Proceedings of the 2011 21st International Conference on Systems Engineering
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NESEA '12 Proceedings of the 2012 IEEE 3rd International Conference on Networked Embedded Systems for Every Application (NESEA)
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This paper deals with a new approach to logic controllers developing process. Classic development approach assumes the use of only one chosen model for the purpose of a logic controller specification. The proper choice of a model is a critical issue because drawbacks, advantages and specific characteristics of a controller will directly or indirectly affect each stage of a development process. A logic controller specification will have an influence on each stage of a development and, first of all, on an end product - namely, a logic controller and its quality. Diversification of the specification through the application of the Correlated State Machine and Hierarchical Configurable Petri Net (CSMHCPN) dual model brings out advantages of both component models eliminating, at the same time, their drawbacks. This paper presents an alternative approach to design logic controllers where at the specification stage two complementary models were used.