Formally Analyzed Dynamic Synthesis of Hardware
The Journal of Supercomputing
Practical Formal Verification in Microprocessor Design
IEEE Design & Test
A Methodology for Large-Scale Hardware Verification
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
A satisfiability procedure for quantified boolean formulae
Discrete Applied Mathematics - The renesse issue on satisfiability
Debugging sequential circuits using Boolean satisfiability
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
ACM SIGDA Newsletter
Functional formal verification on designs of pSeries microprocessors and communication subsystems
IBM Journal of Research and Development - POWER5 and packaging
A high-level requirements engineering methodology for electronic system-level design
Computers and Electrical Engineering
A check-points extraction method for formal verification
ISTASC'07 Proceedings of the 7th Conference on 7th WSEAS International Conference on Systems Theory and Scientific Computation - Volume 7
An efficient specification for model checking using check-points extraction method
ACS'07 Proceedings of the 7th Conference on 7th WSEAS International Conference on Applied Computer Science - Volume 7
Journal of Systems Architecture: the EUROMICRO Journal
Applying formal methods for the design of wireless telecommunication systems
Proceedings of the 3rd international conference on Mobile multimedia communications
Quantitative productivity measurement in IC design
Proceedings of the conference on Design, automation and test in Europe
A system model for formal verification of TLM based transaction properties
SpringSim '07 Proceedings of the 2007 spring simulaiton multiconference - Volume 1
Theoretical Computer Science
Implementation of supervisory control using extended finite-state machines
International Journal of Systems Science
Review: Formal verification of analog and mixed signal designs: A survey
Microelectronics Journal
Formal verification of hardware support for advanced encryption standard
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Applied Assertion-Based Verification: An Industry Perspective
Foundations and Trends in Electronic Design Automation
LCF-style Platform based on Multiway Decision Graphs
Electronic Notes in Theoretical Computer Science (ENTCS)
An abstract reachability approach by combining HOL induction and multiway decision graphs
Journal of Computer Science and Technology
Compact propositional encoding of first-order theories
AAAI'05 Proceedings of the 20th national conference on Artificial intelligence - Volume 1
Compact propositional encodings of first-order theories
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
Interfacing ASM with the MDG tool
ASM'03 Proceedings of the abstract state machines 10th international conference on Advances in theory and practice
Static slicing-based pre-reduction technique for MDG model-checker
IIT'09 Proceedings of the 6th international conference on Innovations in information technology
Simulation-based verification of the MOST NetInterface specification revision 3.0
Proceedings of the Conference on Design, Automation and Test in Europe
Temporal formula specifications of asynchronous control module in model checking
ACS'06 Proceedings of the 6th WSEAS international conference on Applied computer science
Developing an analytical model for planning systems verification, validation and testing processes
Advanced Engineering Informatics
Multiway decision graphs reduction approach based on the HOL theorem prover
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
Behavioral specification diversification for logic controllers implemented in FPGA devices
Proceedings of the Annual FPGA Conference
Verification and enforcement of access control policies
Formal Methods in System Design
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From the Publisher:This advanced textbook presents an almost complete overview of techniques for hardware verification. It covers all approaches used in existing tools, such as binary and word-level decision diagrams, symbolic methods for equivalence checking, and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness. It enables the reader to understand the advantages and limitations of each technique. Each chapter contains an introduction and a summary as well as a section for the advanced reader. Thus a broad audience is addressed, from beginners in system design to experts.