On generating random permutations with arbitrary distributions
The Computer Journal
Algorithm 263: Partition generator
Communications of the ACM
HAKMEM
Constant Time Generation of Set Partitions
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Combinatorial Algorithms: Theory and Practice
Combinatorial Algorithms: Theory and Practice
On the minimum common integer partition problem
ACM Transactions on Algorithms (TALG)
Index to constant weight codeword converter
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
Memory-Based Logic Synthesis
Analysis of Multi-state Systems with Multi-state Components Using EVMDDs
ISMVL '12 Proceedings of the 2012 IEEE 42nd International Symposium on Multiple-Valued Logic
Hardware Index to Permutation Converter
IPDPSW '12 Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum
| Hi-index | 0.00 |
We demonstrate, for the first time, high-speed circuits that generate partitions on a set S of n objects. We offer two versions. In the first, partitions are produced in lexicographical order in response to successive clock pulses. In the second, an index input determines the set partition produced. Such circuits are needed in the hardware implementation of the optimum distribution of tasks to processors. Our circuits are combinational. For large n, they can have large delay. However, one can easily pipeline them to produce one set partition per clock period. We show 1) analytical and 2) experimental time/complexity results that quantify the efficiency of our designs. Our results show that a hardware partition generator running on a 100 MHz FPGA produces partitions at a rate that is approximately 10 times the rate of a software implementation on a processor running at 2.26 GHz.