Computer Architecture, Fourth Edition: A Quantitative Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
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CPU Micro-architecture has a significant impact on performance and hence benchmarking micro-architectural performance is of utility to the High-Performance Computing industry. In lieu of conventional benchmarks, benchmarks that reflect the performance of micro-architectural features, independent of the application profile, are required. Memory hierarchy is an important part of the micro-architecture, having a major impact on performance. In order to make an application independent characterisation of the memory hierarchy, it is necessary to measure its important performance parameters, namely the penalty for a cache miss in different cache levels. The conventional program used for analysing the memory system does not provide direct and cycle-accurate measurements for all levels of the hierarchy. This work presents a novel method of benchmarking the cache. It uses a unique access pattern to generate a deterministic number of cache misses in every level and measures the access time. Using this method the access time for each cache level can be directly obtained. We describe the method in detail herein and discuss the results obtained for different micro-architecture variants. We check the results for consistency using statistics from numerous runs. We also check the results against those provided by the traditional method. Finally, we compare the estimated number of cache misses caused by our deterministic method with the actual number of misses, as measured by hardware performance counters.