Evolving advanced neural networks on run-time reconfigurable digital hardware platform

  • Authors:
  • László Bakó;Sándor Tihamér Brassai;László Ferenc Márton;Lajos Losonczi

  • Affiliations:
  • Sapientia - Hungarian University of Transylvania, Romania;Sapientia - Hungarian University of Transylvania, Romania;Sapientia - Hungarian University of Transylvania, Romania;Lambda Communication Ltd., Tirgu-Mures, Romania

  • Venue:
  • Proceedings of the 3rd International Workshop on Adaptive Self-Tuning Computing Systems
  • Year:
  • 2013

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Abstract

This paper describes the development of a framework for prototyping evolvable hardware Spiking Neural Networks using runtime reconfigurable systems in a Xilinx FPGAs. Practical implementations are focused on the classification of acquired EEG signals that are processed using the wavelet transform. The dynamic run-time partial reconfiguration (PR) capability of the Virtex FPGA is used to interchange those units of the system -- therefore saving precious resources -- that do not run their algorithms in parallel.