Performance analysis of HPC applications on low-power embedded platforms

  • Authors:
  • Luka Stanisic;Brice Videau;Johan Cronsioe;Augustin Degomme;Vania Marangozova-Martin;Arnaud Legrand;Jean-François Méhaut

  • Affiliations:
  • Université de Grenoble, UJF, CNRS, CEA, France;Université de Grenoble, UJF, CNRS, CEA, France;Université de Grenoble, UJF, CNRS, CEA, France;Université de Grenoble, UJF, CNRS, CEA, France;Université de Grenoble, UJF, CNRS, CEA, France;Université de Grenoble, UJF, CNRS, CEA, France;Université de Grenoble, UJF, CNRS, CEA, France

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2013

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Abstract

This paper presents performance evaluation and analysis of well-known HPC applications and benchmarks running on low-power embedded platforms. The performance to power consumption ratios are compared to classical x86 systems. Scalability studies have been conducted on the Mont-Blanc Tibidabo cluster. We have also investigated optimization opportunities and pitfalls induced by the use of these new platforms, and proposed optimization strategies based on auto-tuning.