The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Proceedings of the 6th international workshop on Hardware/software codesign
Efficient compilation of ESTEREL for real-time embedded systems
CASES '00 Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems
Dynamic- and Static-priority Scheduling of Recurring Real-time Tasks
Real-Time Systems
Defining and translating a "safe" subset of simulink/stateflow into lustre
Proceedings of the 4th ACM international conference on Embedded software
Proceedings of the 5th ACM international conference on Embedded software
Buffer optimization in multitask implementations of Simulink models
ACM Transactions on Embedded Computing Systems (TECS)
An Esterel compiler for large control-dominated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Schedulability Analysis of Periodic Tasks Implementing Synchronous Finite State Machines
ECRTS '12 Proceedings of the 2012 24th Euromicro Conference on Real-Time Systems
Task implementation of synchronous finite state machines
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Design synthesis and optimization for automotive embedded systems
Proceedings of the 2014 on International symposium on physical design
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Model-based design using synchronous reactive (SR) models is widespread for the development of embedded control software. SR models ease verification and validation, and enable the automatic generation of implementations. In SR models, synchronous finite state machines (FSMs) are commonly used to capture changes of the system state under trigger events. The implementation of a synchronous FSM may be improved by using multiple software tasks instead of the traditional single-task solution. In this work, we propose methods to quantitatively analyze task implementations with respect to a breakdown factor that measures the timing robustness, and an action extensibility metric that measures the capability to accommodate upgrades. We propose an algorithm to generate a correct and efficient task implementation of synchronous FSMs for these two metrics, while guaranteeing the schedulability constraints.