Buffer optimization in multitask implementations of Simulink models

  • Authors:
  • Marco Di Natale;Valerio Pappalardo

  • Affiliations:
  • Scuola Superiore S. Anna, Pisa, Italy;Scuola Superiore S. Anna, Pisa, Italy

  • Venue:
  • ACM Transactions on Embedded Computing Systems (TECS)
  • Year:
  • 2008

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Abstract

Automatic generation of a controller implementation from a synchronous reactive model is among the best practices for software development in the automotive and aeronautics industry, because of the possibility of simulation, model checking, and error-free implementation. This paper discusses an algorithm for optimizing the single-processor multitask implementation of Simulink models with real-time execution constraints, derived from the sampling rates of the functional blocks. Existing code generation tools enforce the addition of extra buffering and latencies whenever there is a rate transition among functional blocks. This work shows how timing analysis can be used to find the cases in which additional buffering and latency can be avoided, improving the space and time performance of the application. The proposed search algorithm allows finding a solution with reduced and possibly minimal use of buffering even for very high values of processor utilization.