Priority Inheritance Protocols: An Approach to Real-Time Synchronization
IEEE Transactions on Computers
The semantics and execution of a synchronous block-diagram language
Science of Computer Programming
Integrating Model-Based Design and Preemptive Scheduling in Mixed Time- and Event-Triggered Systems
ECRTS '04 Proceedings of the 16th Euromicro Conference on Real-Time Systems
Buffer optimization in multitask implementations of Simulink models
ACM Transactions on Embedded Computing Systems (TECS)
Verification of real-time DEVS models
SpringSim '09 Proceedings of the 2009 Spring Simulation Multiconference
Analysis of SystemC actor networks for efficient synthesis
ACM Transactions on Embedded Computing Systems (TECS)
Representation of automotive software description means in ASCET
MBEERTS'07 Proceedings of the 2007 International Dagstuhl conference on Model-based engineering of embedded real-time systems
Applying product line to the embedded systems
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part III
Simulation of LET models in simulink and ptolemy
Monterey'08 Proceedings of the 15th Monterey conference on Foundations of Computer Software: future Trends and Techniques for Development
Simulating real-time software components based on logical execution time
SCSC '09 Proceedings of the 2009 Summer Computer Simulation Conference
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Embedded software design for real time reactive system has become the bottleneck in the market introduction of complex products such as automobiles, airplanes, and industrial control plants. In particular, functional correctness and reactive performance are increasingly difficult to verify. The advent of model-based design methodologies has alleviated some of the verification-related problems by making the code-generation process flow automatically from the model description. Given the relative infancy of this approach, several companies rely upon design flows based on different tools connected together by file transfer. This way of integrating tools defeats the very purpose of the methodology introducing a high potential of errors in the transformation from one format to another and preventing formal analysis of the properties of the design. In this paper, we propose to adopt a formal transformation across different tools and we give an example of this approach by linking two tools that are widely used in the automotive domain: Simulink and ASCET. We believe that this approach can be applied to any embedded software design flow to leverage the power of all the tools in the flow.