Memory partitioning for multidimensional arrays in high-level synthesis

Authors:
Yuxin Wang;Peng Li;Peng Zhang;Chen Zhang;Jason Cong
Affiliations:
Peking University, China;Peking University, China;University of California, Los Angeles;Peking University, China;Peking University, China and University of California, Los Angeles and UCLA/PKU Joint Research Institute in Science and Engineering
Venue:
Proceedings of the 50th Annual Design Automation Conference
Year:
2013

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Abstract

Memory partitioning is widely adopted to efficiently increase the memory bandwidth by using multiple memory banks and reducing data access conflict. Previous methods for memory partitioning mainly focused on one-dimensional arrays. As a consequence, designers must flatten a multidimensional array to fit those methodologies. In this work we propose an automatic memory partitioning scheme for multidimensional arrays based on linear transformation to provide high data throughput of on-chip memories for the loop pipelining in high-level synthesis. An optimal solution based on Ehrhart points counting is presented, and a heuristic solution based on memory padding is proposed to achieve a near optimal solution with a small logic overhead. Compared to the previous one-dimensional partitioning work, the experimental results show that our approach saves up to 21% of block RAMs, 19% in slices, and 46% in DSPs.