RASP: a general logic synthesis system for SRAM-based FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Boolean matching for complex PLBs in LUT-based FPGAs with application to architecture evaluation
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Partitioning by iterative deletion
ISPD '99 Proceedings of the 1999 international symposium on Physical design
TimberWolf3.2: a new standard cell placement and global routing package
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Methods for hierarchical automatic layout of custom LSI circuit masks
DAC '78 Proceedings of the 15th Design Automation Conference
Placement algorithms for arbitrarily shaped blocks
DAC '79 Proceedings of the 16th Design Automation Conference
Placement and routing algorithms for hierarchical integrated circuit layout
Placement and routing algorithms for hierarchical integrated circuit layout
FPGA technology mapping: a study of optimality
Proceedings of the 42nd annual Design Automation Conference
A thermal-driven floorplanning algorithm for 3D ICs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Thermal-driven multilevel routing for 3-D ICs
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Thermal via planning for 3-D ICs
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
An efficient and versatile scheduling algorithm based on SDC formulation
Proceedings of the 43rd annual Design Automation Conference
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Thermal-Aware 3D IC Placement Via Transformation
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Pattern-based behavior synthesis for FPGA resource reduction
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
FPGA-Based Hardware Acceleration of Lithographic Aerial Image Simulation
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Behavior-level observability don't-cares and application to low-power behavioral synthesis
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Scheduling with soft constraints
Proceedings of the 2009 International Conference on Computer-Aided Design
Behavior-Level Observability Analysis for Operation Gating in Low-Power Behavioral Synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic memory partitioning and scheduling for throughput and power optimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Thermal-aware cell and through-silicon-via co-placement for 3D ICs
Proceedings of the 48th Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Memory partitioning for multidimensional arrays in high-level synthesis
Proceedings of the 50th Annual Design Automation Conference
| Hi-index | 0.00 |
I had the pleasure to work at the Xerox Palo Alto Research Center (PARC) as a summer intern in 1987 with Dr. Bryan Preas. One of the many valuable lessons that I learned through that summer internship is that as a researcher in electronic design automation (EDA), there is a tremendous value to be had from an involvement in VLSI circuit and system designs. This involvement guarantees a first-hand opportunity to discover and formulate new and insightful EDA problems, and to develop practical and impactful solutions. This experience had a great influence on my career as an EDA researcher. In this paper, I would like to share several examples of research projects that I directed at UCLA which followed the principle of starting from design to gain insight and inspiration for design automation.