Algorithms for retiming level-clocked circuits and their use in increased circuit robustness

Authors:
Brian Eugene Lockyear
Affiliations:
Univ. of Washington
Venue:
Algorithms for retiming level-clocked circuits and their use in increased circuit robustness
Year:
1995

Citing 0
Cited 2

Retiming sequential circuits with multiple register classes

DATE '99 Proceedings of the conference on Design, automation and test in Europe
On the performance of level-clocked circuits

ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)

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Abstract