Complexity of counting output patterns of logic circuits

Authors:
Kei Uchizawa;Zhenghong Wang;Hiroki Morizumi;Xiao Zhou
Affiliations:
Yamagata University, Yonezawa-shi Yamagata, Japan;Tohoku University, Aoba-ku, Sendai, Japan;Shimane University, Matsue, Shimane, Japan;Tohoku University, Aoba-ku, Sendai, Japan
Venue:
CATS '13 Proceedings of the Nineteenth Computing: The Australasian Theory Symposium - Volume 141
Year:
2013

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Abstract

Let C be a logic circuit consisting of s gates g1, g2,..., gs, then the output pattern of C for an input x ε {0, 1}n is defined to be a vector (g1(x), g2(x),..., gs(x)) ∈ {0, 1}s of the outputs of g1, g2,..., gs for x. For each f: {0, 1}2 → {0, 1}, we define an f-circuit as a logic circuit where every gate computes f, and investigate computational complexity of the following counting problem: Given an f-circuit C, how many output patterns arise in C? We then provide a dichotomy result on the counting problem: We prove that the problem is solvable in polynomial time if f is PARITY or any degenerate function, while the problem is #P-complete even for constant-depth f-circuits if f is one of the other functions, such as AND, OR, NAND and NOR.